Chapter 5 - The Theory of Wide-Field Step Recovery Diodes (WFSRD)

5.1 - Remarks on the Philosophy Adopted in This Study

Before beginning to discuss the theoretical aspects of the WFSRD, it is important to first note the approach taken by this author. It was concluded based on the results of Chapter 3 that the desired devices were likely diffused structures, and it is obvious that the diodes must be under high-level injection conditions for reasonable forward bias given the light doping required to support high breakdowns voltages. This situation is thus not likely to immediately offer simple exact analytical results: most analytical studies in the literature and in textbooks deal strictly with abrupt junctions and/or low-level injection. Most of the common simplifying approximations are not appropriate in this case. For this reason, computer simulations were used as a primary tool in this study. In particular, simple one-dimensional diffused structures were simulated many times using MEDICI, a powerful large-signal semiconductor simulator. The theoretical results in this section were developed after noting patterns in the simulations. For this reason, the approach taken in this section is to introduce particular diode structures with known (simulated) characteristics, and then develop the analytical theory, rather than starting "from scratch". The fabricated devices reported in later sections are almost ideal parallel-plane structures, so the one-dimensional simulations are directly applicable.

One other aspect should be noted. The diodes studied here have been developed with pulse generator applications in mind, since this is the context in which this phenomenon was discovered. This means the diodes are intended to act as pulse sharpeners. Given their similarity to SRDs, they may also prove to be useful in frequency multiplication applications. These applications have not been considered here.

5.2 - Introductory Reference Structures

5.2.1 - Abrupt Structures versus Diffused Structures

For the purposes of comparison, two reference structures are introduced in this section. The first structure, shown in Figure 5.1, is an ideal abrupt pspn diode that shall be referred to herein as EP1. The second, shown in Figure 5.2 is a diffused diode, with two gaussian profiles superimposed on a uniform background, and shall be referred to herein as DF1. More precisely, for Figure 5.2,

(5.1)

where N(x) is the doping profile, with N(x) > 0 taken to mean net acceptor doping, and N(x) < 0 net donor doping. N_S is the surface concentration, and N_B is the wafer background doping. For both EP1 and DF1, A = 1 mm², L = 212 m, N_S = 10¹⁹ cm^-3, N_B = 1.2 x 10¹⁴ cm^-3, and τ_p0 = τ_n0 = 55 ns. For DF1, λ = 29.7 μm. For EP1, W = 30 μm.

Figure 5.1 - Doping Profile of EP1

Figure 5.2 - Doping Profile of DF1

Figure 2.1 shows the simple reverse-recovery test circuit that has been simulated, with R_L = 50 Ω. The reverse recovery transient should consist of a period of roughly constant reverse current (I_R for time ts) followed by the decay of the current to zero, in time t_R, as discussed in Chapter 2. Figures 5.3 and 5.4 show the simulated transient response for EP1 and DF1 respectively. As expected, EP1 shows the slow ramp/fast transition characteristic of ps_pn abrupt rectifiers. When V_d = V_RAMP, where V_RAMP is obtained from (2.15), the diode current is determined by the circuit loop equation, giving:

(5.2)

This agrees reasonably well with Figure 5.3, which shows the fast transient beginning at approximately I = -3.7 A.

Figure 5.3 - The transient response of EP1. The labeled data points correspond to the individual curves in Figure 5.5.

Figure 5.4 - The transient response of DF1. The labeled data points correspond to the individual curves in Figure 5.6.

The parameters of DF1 have been deliberately chosen to produce a reverse recovery transient that displays step recovery. It clearly yields a "snappier"transient, although the storage time is reduced, which is generally undesirable in pulse generator applications.

To understand why EP1 and DF1 behave so differently, the time evolution of the electric fields in the devices is plotted in Figures 5.5 and 5.6 respectively. It is immediately apparent that the p+ p and p n+ junctions in EP1 produce strong, narrow, one-sided electric field profiles, which of course are characteristic of abrupt one-sided junctions. In contrast, the field profiles generated by DF1 are much lower and much more diffuse. They resemble the fields generated at linear junctions. Since the fields generated at the two junctions in the diode are so much more diffuse, they overlap much sooner in DF1 than EP1. Also, when they overlap, the area under the electric field curve is much smaller in the case of DF1 than EP1, hence this occurs at a much lower voltage in the DF1 case. By comparing Figure 5.3 to Figure 5.5, and 5.4 to 5.6, it is evident that the fast transition begins when the entire middle layer is under high-field conditions. The spread-out nature of the electric field profiles in the DF1 diode then is the key to high voltage step recovery.

Figure 5.5 - Electric field evolution in EP1. The curve labels correspond to the individual time points shown in Figure 5.3.

Figure 5.6 - Electric field evolution in DF1. The curve labels correspond to the individual time points shown in Figure 5.4. (Curves A and B are too small to appear at the scale used.)

5.2.2 - The Influence of Background Doping

Not all diffused diodes will produce the desired electric field overlap discussed above. The background doping N_B can have a very large impact on the nature of the diode recovery. The influence of N_B can be explained by referring to the Medici simulation results in Figures 5.7 to 5.16. These graphs show the time evolution of the net charge (that is, p - n + N_D+ - N_A-) and the current transient waveform for five different doping profiles, DF2 to DF6 for the circuit in Figure 2.1. All have A = 1 mm², N_S = 10¹⁹ cm^-3, λ = 29.7 μm, and L = 212 μm. Each has a different background doping: -5 x 10¹⁴ cm^-3, -1.2 x 10¹⁴ cm^-3, 0 cm^-3, +1.2 x 10¹⁴ cm^-3, +5 x 10¹⁴ cm^-3, for DF2 to DF6 respectively. (Positive values refer to p-type doping.)

The net charge development is quite different in each case. For the two n-type doped diodes, DF2 and DF3, the area of positive net charge appears to propagate from left to right, in a simple fashion. This occurs because the positive space charge required to form the right side of the p+ n junction is supplied largely by the ionized donors. The nn+ junction essentially plays no part in the recovery until the charge wave from the p+ n junction sweeps over to it. In contrast, the space charge required to form the right side of the p+ p junction in DF5 is initially supplied by mobile holes rather than by fixed charge. As the current falls, the mobile hole concentration is not sufficient to compensate the ionized acceptors near the p+ p junction. Then, the positive net-charge peak appears to collapse, rather than propagate, and the necessary positive charge is provided by ionized donors on the right side of the metallurgical junction.

Since DF2 exhibits a simple expanding charge wave, propagating from the p+ n metallurgical junction, only one electric field peak develops, as shown in Figure 5.17. In the contrast, DF5 initially develops a field at the p+ p (non-metallurgical) junction. When the mobile charge is removed from the vicinity of the metallurgical junction, a second electrostatic junction must form. Thus when the space charge has propagated from the p+p junction to the metallurgical junction, it forces a second electric field peak to develop in response, as is shown in Figure 5.18. This causes a substantial electric field to cover to entire middle region, which triggers the desired fast transition, as all remaining mobile charge carriers are removed from the diode at, or near, their saturation velocity.

It is important to determine where exactly the p+ p space charge region forms. This is obvious in abrupt structures, where there is ideally an infinite doping gradient, at which an electrostatic junction must occur. There is no such singularity in the p+ p diffused junction. As discussed earlier, the positive space charge in the p+ p junction must be provided by mobile holes. The concentration of mobile holes must exceed the net acceptor concentration for a net positive charge to exist. The point where these two concentrations are equal (i.e. zero net charge) defines the p+ p junction (if one neglects mobile electrons). Since a large electric field develops at the junction rather quickly, as witnessed in Figure 5.18, and since hole and electrons velocities start to saturate at relatively low electric fields (>> 10⁴ V/cm) compared to the scale in Figure 5.18, the hole density in the space-charge region can be approximated as

(5.3)

For the circuit of Figure 2.1, p₀ = 3.7 x 10¹⁴ cm^-3 (again using A = 1 mm²). This concentration is noted on the net charge graphs with a thin solid line. Since the net charge is equal to the negative of the doping at the end of the transient, the intersection of the last time curve and p₀ indicates the starting position of the p+ p junction, x_p0. x_p0 is also shown on the net charge graphs, by a thin vertical line.

It is fairly straightforward to deduce that N_B must fall between 0 and p₀. If N_B < 0, (as is the case in Figures 5.7 to 5.10) the positive space charge will be composed largely of fixed ionized donors, so the junction will not need to extend into the n+ regions to uncover fixed charge until near the end of the transient, as noted earlier. Thus the desired double-peaked electric field does not develop.

The net charge evolution for DF6 in Figure 5.16 depicts a situation where N_B > p₀. In this case, the mobile charge is unable to build a significant positive space charge to the left of the metallurgical junction. This leads to the development of a significant electrostatic junction at the metallurgical junction only, so a single peaked electric field develops. While this does lead to a good waveform, as shown in Figure 5.15, it is no better than the more lightly doped DF5 waveform (where 0 < N_B < p₀), and the breakdown voltage is significantly worse. Medici simulations show that DF5 has V_BR>> 660V, whereas DF6 has V_BR>> 550V.

Thus one can conclude that for step recovery to occur, one should have

(5.4)

or, equivalently,

(5.5)

where

(5.6)

In equation (5.5) the general charge removal velocity v_R has been used rather than v_S as in (5.1). This is because usually the electric fields at the beginning of the fast transient are not quite high enough to fully saturate the electron and hole velocities. In practice, the best results have been obtained using:

(5.7)

DF4 is an intermediate case with N_B = 0. It shows elements of both charge propagation and charge collapse.

Appendix F includes the simulation batch-file used to generate the Medici simulation of DF5, so that future researchers can reproduce these results.

Figure 5.7 - Transient response of DF2. The labeled data points correspond to the individual curves in Figure 5.8 and 5.17.

Figure 5.8 - Net charge evolution in DF2. The curve labels correspond to the individual time points shown in Figure 5.7. (Curves A and B are too small to appear at the scale used.) The arrow shows the "charge wave" nature of the charge evolution with time.

Figure 5.9 - Transient response of DF3. The labeled data points correspond to the individual curves in Figure 5.10.

Figure 5.10 - Net charge evolution in DF3. The curve labels correspond to the individual time points shown in Figure 5.9. (Curves A, B and C are too small to appear at the scale used.)

Figure 5.11 - Transient response of DF4. The labeled data points correspond to the individual curves in Figure 5.12.

Figure 5.12 - Net charge evolution in DF4. The curve labels correspond to the individual time points shown in Figure 5.11. (Curves A and B are too small to appear at the scale used.)

Figure 5.13 - Transient response of DF5. The labeled data points correspond to the individual curves in Figure 5.14 and 5.18.

Figure 5.14 - Net charge evolution in DF5. The curve labels correspond to the individual time points shown in Figure 5.13. (Curves A and B are too small to appear at the scale used.) The left arrow shows the "charge collapse" nature of the charge evolution with time. The right arrow shows the later development of the second space charge region.

Figure 5.15 - Transient response of DF6. The labeled data points correspond to the individual curves in Figure 5.16.

Figure 5.16 - Net charge evolution in DF6. The curve labels correspond to the individual time points shown in Figure 5.15. (Curves A and B are too small to appear at the scale used.)

Figure 5.17 - Electric field evolution in DF2. The curve labels correspond to the individual time points shown in Figure 5.7. (Curves A and B are too small to appear at the scale used.)

Figure 5.18 - Electric field evolution in DF5. The curve labels correspond to the individual time points shown in Figure 5.13. (Curves A and B are too small to appear at the scale used.)

5.3 - General Description of the New SRD Mechanism

Now that some of the salient details have been introduced in the previous section, a general review of the new proposed SRD mechanism will be provided in this section.

The new SRD mechanism operates as follows. The diode is biased with a small constant forward DC current. This swamps the middle region of the psn diode with electrons and holes, and high injection conditions prevail. The diode acts as a low resistance. When a large reverse bias voltage is suddenly applied, the reverse bias slowly withdraws electrons and hole from the middle region. This region is still largely neutral, so the current will be almost entirely a diffusion current. This means that the slope of the carrier concentrations will change. This will lead to the removal of charge from the quasi-neutral middle region, and this region will shrink. A significant space charge region develops at the p+ p- junction first, as discussed in Chapter 2. However, as mobile charge is removed from the center, too few holes are left on the p- side of the junction to support a positive space charge. Since a positive space charge must exist to counterbalance the ionized acceptors in the p+ region, a second space charge region develops around the metallurgical junction, and the positive space charge is now provided by the ionized donors in the n+ region. This leads to envelopment of the entire middle region with space charge. After this point, the electric fields rapidly remove the free carriers, and hence the electric fields rapidly "snap" to the full reverse voltage.

(It should be mentioned that the first SRDs manufactured also had a diffused profile, and a graded junction [Moll62], [Kocs76]. The graded junction provided a built-in electric field throughout the active region, which aided in charge removal. This is an entirely different mechanism than that presented here. The carrier densities are too high, and the doping too low, for significant built-in electric fields to exist in WFSRDs.)

Figure 5.19 - A typical SRD pulse-sharpening waveform.

Figure 5.19 shows a typical SRD pulse-sharpening waveform. From this diagram, it is obvious what must be optimized. The maximum operating voltage must be maximized. This implies that the diode breakdown voltage V_BR must be maximized. It is also desirable to maximize t_S. Conversely, t_R, V_RAMP, and the effect of the diode capacitance, which manifests itself as a "tail" on the waveform, must be minimized. At the same time the conditions for step recovery to occur (equations (5.4) to (5.6)) must be satisfied. Since the occurrence of step recovery and V_BR both depend very heavily on N_B, it is obvious that some optimization process will be required.

The remaining section in this chapter will be devoted to determining these parameters from the diode doping profile. The discussion of the method of determining V_BR has already been presented in a separate chapter, due to its length.

5.4 - Parameter Determination

5.4.1 - N_B

For consistency, the results of section 5.2.2 will be repeated here. It was shown that for step recovery to occur,

(5.8)

or, equivalently,

(5.9)

where

(5.10)

and

(5.11)

It should be noted that the factor g is directly related to the diode cross-sectional area, since for the circuit of Figure 2.1,

(5.12)

5.4.2 - V_RAMP

When the two space charge regions overlap significantly, the voltage developed across the device, obtained by integrating the electric field:

(5.13)

should be minimized. This voltage is the ramp voltage that one wishes to minimize in a step recovery diode. Determining the voltage across the device exactly is a difficult problem best suited to simulators such as MEDICI, however, some simple approximations can be made to avoid this need in the initial stages of design.

When the space charge regions begin to overlap, the net charge should be zero at two points: at the p+ p junction x_p0, and at the metallurgical junction x_mj. This is seen in Figure 5.14 for the DF5 structure. (From Figures 5.14 and 5.18, it is evident that the space charge regions overlap at instant "F"). The shape of the positive space charge P(x) between these two points can be approximated as a parabola, that is:

(5.14)

For the purposes of this approximation, the apex of the parabola will be assumed to be at the midpoint between x_p0 and x_mj, such that

(5.15)

Since

(5.16)

one of the constants in (5.14) can be eliminated, this yields:

(5.17)

The voltage developed across the left electric field peak can be estimated by using equation (5.13) and integrating the positive space charge between x_p0 and x_mj, so that

(5.18)

The voltage developed across the negative space charge that is to the left of x_p0, V-, must also be accounted for. As a first approximation, it shall be assumed that V+ = V-. Then, evaluating (5.18) yields a simple expression for the voltage at overlap, V_RAMP:

(5.19)

A value for A₁ must also be determined. From (5.16) it can be seen that A₁ = P(x₀), so the space charge at x₀ must be found. The net charge Q_N is the given by

(5.20)

The doping N(x) can be found directly from (5.1), and the mobile hole concentration p from (5.3). If one makes the assumption that the mobile electron concentration n is small compared to the other two components, then

(5.21)

or, using (5.9),

(5.22)

If this is substituted into (5.19), and if it is noted that x₀ = (x_p0 + x_mj)/2 and x = x_mj - x_p0, then one obtains

(5.23)

In this analysis, it has also been assumed that the voltage developed across the p- n+ junction is small compared to that of the p+ p- junction. In practice, this assumption is a reasonable one.

Since x_p0 and x_mj depend on the choice of λ and L, V_RAMP will be a complicated function of and L. When designing the diode, V_RAMP(λ,L) must be minimized to achieve a low initial ramp voltage. However, a second constraint is required to choose an optimum λ and L once N_B has been determined from (5.9). This second constraint is obtained by considering the need to maximize the breakdown voltage of the device.

5.4.3 - The Transition Time t_R

The fast transition begins when a small electric field exists throughout the entire middle region. In other words, this is the point where the condition of quasineutrality is just beginning to fail throughout this region. We can make several assumptions to obtain a good approximation of the transition time. First, we can assume that all electrons have been removed from the left of the metallurgical junction, and all holes have been removed from the right. Secondly, we can assume the entire middle region is still neutral (such that the accumulated voltage is very small). Thus, considering the left half of the middle region, every acceptor is compensated by a mobile hole, and to the right of the junction every donor is compensated by an electron. The total mobile charge can then be determined by integrating the absolute value of the doping across the depletion region. We can observe from the electric field and net charge plots previously shown that the edges of the now-homogeneous space charge region varies very little between the beginning of the fast transient and the end, so we can use the values of x₁ and x₂ as calculated in Chapter 4 as the edges of the region. The third assumption will be that the fast transient voltage is linear with time, which is the ideal waveform. Then the time can simply be calculated from a charge control approach as

(5.24)

where

(5.25)

or, equivalently,

(5.26)

If one compares the expression given in (5.25) to that given in equation (4.3), it becomes apparent that (5.24) can be written more simply as

(5.27)

At first glance, the expression in (5.27) may be misleading, in that it suggests that semiconductors with lower critical fields will have shorter transition times. This is not true, since any decrease in E_C will be more than offset by an increase in A, for a given operating voltage. This is due to the fact that a lower E_C will require a wider depletion region to accommodate the same voltage. However, (5.19) shows that V_RAMP increases approximately quadratically with width, hence A will have to increase similarly to counterbalance the change in V_RAMP. (Increasing A lowers J_R, which as shown in (5.21) will act to lower V_RAMP.)

The expression in (5.27) is a fairly simple estimate of t_R. Calculating t_R more accurately would require an exact knowledge of the carrier distribution evolution during the reverse transient, and during the forward steady-state as well. Realistically, this can only be achieved by complete computer simulations. Several such simulations are presented in Appendix D, in order to gauge the effect of lifetime variation on t_R. This second-order effect is not included in (5.27).

5.4.4 - RC Time Constant

Since, as noted before, the edges of the space charge region are nearly stationary after the start of the fast transient, the junction capacitance is also nearly constant. It is important to minimize this capacitance, since it acts to slow down the fast transient, with a time constant of R_LC. (R_L, the load resistance, is assumed to be 50 Ω throughout this thesis.) It will add an exponential "tail" onto the end of the transient, as depicted in Fig 5.19. The junction capacitance can be treated as a first approximation as a parallel plate capacitor, with plates at x₁ and x₂; hence

(5.28)

and

(5.29)

where τ_RC is the characteristic time constant of the junction capacitance - load resistance network.

5.4.5 - Storage Time t_S

Calculating the storage time is in fact an extremely complicated task if an exact answer is desired. Knowledge of the actual carrier distribution throughout the diode is required, which is impossible to do analytically due to the lack of simple boundary conditions in the diffused rectifier. Even for the case of an abrupt pin geometry with constant recombination lifetimes throughout the i region, the storage time has only been calculated numerically [Slat80]. Since the device is in high injection, the assumption of constant recombination lifetimes is not correct.

The storage time can be estimated using simple (but not very accurate) charge control techniques. This yields equation (3.4), repeated here:

(5.30)

where τ_EFF is the effective lifetime of the charge carriers in the device. However, this equation is not especially useful for design, since the carrier lifetimes are highly dependent on the fabrication process, and are not easily measured. Also, τ_EFF is a complex function of parameters, such as the diode structure, low-level carrier lifetimes, and carrier density.

As mentioned earlier, diffused structures have larger effective lifetimes than comparable epitaxial structures, since a diffused rectifier will have more stored charge for a given bias current than an epitaxial rectifier [Coop83]. In an epitaxial rectifier, the stored charge is confined between the two junctions. The diffused rectifier has much poorer charge confinement, and a considerable additional portion of charge will exist in the p+ and n+ regions of the diode.

5.5 - Design Methodology

In the previous chapters, expressions for V_BR, V_RAMP, t_R, and τ_RC were obtained in terms of the doping profile and circuit parameters. This chapter presents a method of using the expressions to obtain the best possible device for a given application.

It is not possible to work backwards from the desired switching parameters and breakdown voltage to find the best doping. Instead, many doping profiles must be considered, and the parameters calculated for each. However, for each profile some optimization is required, since the ramp voltage decreases with increasing area, whereas t_R and τ_RC increase.

A program has been written that will perform the required device optimization. Its operation is discussed below.

5.5.1 - Optimization

The program considers many different profiles. The user may vary the number of profiles considered, and what ranges of values are used for N_S1, N_S2, N_B, λ₁, λ₁/λ₂, and L. For each profile, the breakdown voltage is calculated using the method discussed in Chapter 4. No optimization is necessary at this point, since V_BR is independent of the device cross-sectional area. If the value of V_BR is not within the desired range, the calculations for this structure are discarded. Otherwise they continue as described below.

The program also lets the user set what fraction of the breakdown voltage the operating voltage V_OP will be. (Ideally, the operating voltage should be slightly less than V_BR, but in practice a safety margin must be added.) Also, the user can set what fraction of V_OP the ramp voltage V_RAMP may be. Since rise times are usually defined as 10%-90%, V_RAMP is usually set at 10% of V_OP. Any higher would produce an insufficiently "square" waveform, and a smaller value would increase t_R and _RC more than necessary.

Given this information, and the calculated values of V_BR and V_OP, the program determines the value of g that will yield the desired V_RAMP, using equation (5.23). The diode cross-sectional area can then be determined using (5.12). With all doping and geometrical factors now determined, t_R and τ_RC can be determined. As a figure of merit, the program computes

(5.31)

for each structure and ranks each solution, such that the best structure for a given operating range can be found. (The factor of 2.2 converts the RC time constant to a 10%-90% rise time [Sedr91]).

Figure 5.20 shows a typical screen shot from the program. At the bottom, the best three structures are shown. All structures that satisfied the breakdown voltage required were stored in a file as well.

The figure of merit t_EFF is only an approximate figure of merit, so that when choosing between two structures with very similar t_EFF (i.e. ±20%) it is wise to confirm the choice with a device simulator such as Medici, especially if one is more manufacturable than the other.

Figure 5.20 - Typical screen shot from WFSRD parameter calculation program.

5.6 - The Chosen Device

Figure 5.21 shows the optimization parameters used to find a good structure to implement a device with V_BR = 500 V and V_OP = 300 V. (Note the considerable safety margin.) In Figure 5.21, the program has been run to display the characteristics of a single structure, the one that was ultimately fabricated. A rise time (t_EFF) of 1.1 ns is predicted for this device. This combination of parameters did not produce the very best theoretical switching performance, but it had the advantage of having a not-too-small value of L and small value of λ. (As indicated in Figure 5.20, the fast predicted switching time was 0.80 ns). The desirability of a large L and a small λare discussed in the next chapter.

Figure 5.21 - WFSRD parameter calculation program output for the device to be fabricated.

5.7 - Operating Range Limitations

It is of interest to establish the maximum voltage that WFSRDs can be expected to operate at. To determine this, the WFSRD parameter calculation program was run many times to determine the fastest devices as a function of voltage. Several limits were imposed on the search-space, to keep the device practical. In particular, λ was restricted to vary between 5 μm and 100 μm (in 1 μm steps) , and L was varied between 50 μm and 500 μm (in 5 μm steps). The results are shown in Figure 5.22.

Figure 5.22 - Dimensional and switching parameters for the fastest WFSRD devices with the indicated breakdown voltage.

The results of Figure 5.22 show that the 100 μm limitation on λ is in fact a severe restriction. The optimal devices would actually occur above this limit. However, obtaining diffusion lengths above 100 μm is not practical. The 30.6 μm diffusion length used in fabricating the device discussed in the next chapter required an extremely long drive-in diffusion of 180 hours, and an extremely hot temperature of 1250°C. Since t ∝ λ², where t is time, the drive-in time required for λ = 100 μm is excessive (11 weeks at 1250°C).

Figure 5.23 shows the same data as Figure 5.22, except that it is for devices whose switching time is 33% greater than those in Figure 5.22. It shows that some gains in practicality can be made if non-optimum devices are used. If a λ of 50 μm is considered the maximum practical dopant diffusion length (this corresponds to three weeks of drive-in at 1250°C), then practical devices exist for V_BR < 1100 V.

Figure 5.23 - Dimensional and switching parameters for devices that are 33% slower than the fastest WFSRD devices with the indicated breakdown voltage.

These results suggest that the maximum practical operating voltage for DSRDs is on the order of 1 kV. The precise limit is a function of manufacturing constraints. If exceedingly long drive-in times or slower devices can be tolerated, then devices with higher breakdown voltages can be obtained. However, it is probably more practical to use multiple lower-voltage devices connected in series.