Version: August 6, 1996

Forward Transient Charge Injection in psn Diodes at Medium to High Injection Levels

Michael J. Chudobiak, Member, IEEE and David J. Walkey, Member, IEEE

Abstract

The forward transient in psn power diodes has been studied. A new expression, simpler than the conventional one, has been developed for the evolution of the carrier distributions in response to a current step in pin diodes. The usefulness of this expression as an approximate solution for lightly doped psn rectifiers is considered. A critical current density is derived, above which a psn diode behaves as a pin diode. This critical current density is shown to be useful for designing drift step recovery diodes, and other similar modern power structures that require pulsed forward biasing. In particular, it allows the bias current to be chosen so as to minimize the step recovery ramp voltage, and it allows an estimate of the maximum stored charge in a drift step recovery diode commensurate with step recovery action.

I. INTRODUCTION

In traditional step recovery diodes charge is stored in the diode by means of a nearly steady-state forward current flow. That is, the forward bias exists continuously for times comparable to or longer than the hole and electron lifetimes in the active region. However, the more recent high-power drift step-recovery diode (DSRD) uses a short forward bias pulse to introduce stored charge to the device [1]-[3]. Since the pulse width is considerably less than the carrier lifetimes, the charge is concentrated near the junctions, which is desirable for a sharp reverse step recovery. Other more complicated high-power devices have been designed with similar pulsed biasing in mind [4],[5]. For instance, by using this "reversible injection control" [2] two-terminal functional equivalents of the thyristor have been made, which do not suffer from current localization effects characteristic of three terminal devices. Because of this, these new structures have been shown to be capable of operating at much higher power levels than conventional structures, and as such, it has become more important to examine the nature of the forward transient in the basic p⁺sn⁺ diode structure.

II. THE FORWARD TRANSIENT IN PIN STRUCTURES

It is possible to obtain an analytical solution for the forward transient for two cases, those being the p⁺in⁺ structure, where high injection is implicitly assumed, and the p⁺sn⁺ structure if it is assumed that the s layer (either p-type or n-type) is under low injection. Since the devices mentioned above are power devices, the low injection case is not of interest here. The forward current is assumed to be constant for the duration of the transient.

The solution for a rectangular pin structure can be obtained by solving the differential equation [6]

(1)

where p(x,t) is the excess hole density, X is the distance normalized to the ambipolar diffusion length L, and T is the time normalized to the lifetime .

Equation (1) is subject to the boundary conditions [6],[7]

(2)

(3)

and the initial condition [6]:

(4)

where W is the width of the i region, normalized by L, and J_F is the forward current density. In obtaining (3), it has been assumed that neutrality exists in the i region, such that p(X,T) = n(X,T).

Solving (1) using Laplace transform methods, subject to the boundary conditions (2) and (3) and the initial condition (4) yields:

(5)

This solution is considerably simpler and more compact than an equivalent solution presented in [6]. (It should be noted that both equation (5) and the solution given in [6] only satisfy the initial condition given in (4) in the limit of, not at t = 0. This is because the boundary conditions (2) and (3) are in fact inconsistent with the initial condition (4), a fact which is not always appreciated.)

The evolution of p(X,T) is shown for , w = 250, J_F = 10 A/cm² in Figure 1. (The steady state solution is denoted as p_SS(X)). It is immediately evident that substantial charge injection occurs at both x = 0 (the p⁺i junction) and at x = w (the in⁺ junction) throughout the entire transient.

Fig. 1. Calculated charge injection in a pin diode during the forward transient, for several different values of . Note that substantial charge injection occurs at both junctions throughout the entire transient. p_SS(X) is the steady-state distribution.

III. THE FORWARD TRANSIENT IN PSN STRUCTURES

If the forward current in a p⁺sn⁺ diode is sufficiently large, the injected carriers will overwhelm the background doping, allowing the analytical results for a pin diode to be used to determine the transient response. This section quantifies the critical current density above which these results can be used.

Consider a device with a lightly doped n-type middle layer, and assume that quasi-neutrality exists in this layer. Then,

(6)

Also assume that the doping in the p⁺ and n⁺ regions is much higher than in the n^- middle region. Then the current at the p⁺n^- junction (x=0) will be almost entirely a hole current, and the current at the n^-n⁺ junction (x=w) will be an electron current. Mathematically,

(7)

(8)

(9)

(10)

The transport equations can be written as

(11)

and

(12)

where V_T is the thermal voltage kT/q. Using equations (6)-(10), the transport equations can be rearranged in a straightforward manner to obtain:

(13)

and

(14)

If the first terms in equations (11) and (12) are identified as diffusion terms, and written as J_diff, and if we define

(15)

then (13) and (14) can be rewritten in the form:

(16)

and

(17)

Equations (16) and (17) show that the balance of the drift and diffusion currents at the junctions is affected by the presence of doping in the middle layer. These two functions are plotted as a function of f in Figure 2. As , and hence , both functions approach the value 0.5, which of course leads to equations (2) and (3). In other words, the drift and diffusion currents at both junctions in a pin diode are equal. This remains largely true for f < 0.1. As N_D increases, and f increases correspondingly, the current at the n^-n⁺ junction is dominated by a drift current, and the current at the p⁺n^- junction is dominated by the diffusion component. Since the diffusion current at the high-low junction becomes small, dn/dx is also small and very little charge is built up at the high-low junction.

Fig. 2. Diffusion current as a fraction of the total current, at both junctions. In the limiting case of no middle-layer doping, f = 0 and the diffusion and drift components are equal. For very heavy doping, and the high-low junction current is almost entirely drift current, and the p⁺n junction current is almost entirely diffusion current.

It is straightforward to show that f increases moderately quickly with N_D, if one considers the time immediately after the beginning of the forward transient current pulse. At this early time, no holes will have yet traveled to the n^-n⁺ junction, so we can write:

(18)

The current in the bulk of the middle layer must be ohmic, since little charge has been injected and n N_D. Thus, in this region,

(19)

If this bulk electric field is assumed to build up from zero over a short distance near the n^-n⁺ junction, then the derivative dE/dx in (18) can be approximated as . Then, combining (18), (19) and (15) so as to eliminate n(w,0⁺) yields

(20)

An estimate for can be obtained by writing

(21)

The value of dn/dx in (21) can be estimated from the electron diffusion current. Of course, the diffusion current to total current ratio varies with f, as discussed above. The most interesting case is for f =1, where the diffusion current is 1/3 of J_F, since the diode behaviours for f >> 1 and f << 1 are quite different. The case of f =1 is a "critical" boundary case. Thus,

(22)

Then combining (19) to (22) to eliminate yields:

(23)

where

(24)

Hence, for current densities substantially larger than J₀ (say J_F > 10 J₀), the diode acts as though it were intrinsic, leading to balanced drift and diffusion currents, and charge injection from both junctions. For current densities substantially less than J₀ (say J_F < 0.1 J₀), the charge injection will be dominated by the p⁺n^- junction, and relatively little charge will be stored at the high-low junction. Since J₀ N_D^3/2, the critical current density J_F = J₀ (corresponding to f = 1) increases moderately quickly with increasing doping, and the usefulness of the intrinsic approximation becomes restricted for even relatively light doping levels.

Physically, equation (15) shows that the condition f(x,t) = 1 corresponds to an injected carrier density of n(x,t) = 2 N_D. Thus, if the forward current is large enough such that n(w,0⁺) >> 2 N_D at the high-low junction immediately after the beginning of the transient (i.e. J_F >> J₀), the diode will act as a pin diode.

The validity of (24) as an estimate of J₀ is shown by comparison with MEDICI simulations in Figure 3. The hole distribution at t = 60 ns is shown for several values of N_D, and hence J₀ (calculated from (24)), with , w = 250, and J_F = 10 A/cm². (Since the time is the same in each case, the total charge in each of the diode structures is approximately equal.) Clearly, the hole distributions for J_F/J₀ equal to (i.e., a pin diode), 100, and 10 are very similar and show significant charge injection from both junctions, as expected. In contrast, the hole distributions for J_F/J₀ equal to 0.1 and 0.01 show injection at the p⁺n junction only, as expected. The curve for J_F/J₀ =1 is an intermediate case, showing some charge injection from the high-low junction, but much less than for the cases with larger J_F/J₀ ratios. These simulations confirm the theoretical results derived above. (It should be noted that the doping corresponding to J₀ is quite small - only 5.610¹³ cm^-3.)

Fig. 3. Simulations calculated using the MEDICI simulator to confirm the validity of the derived expression for J₀. J₀ is calculated from (24). For J_F/J₀ > 10, the diode behaves like a pin diode, with substantial charge injection at both junctions. For J_F/J₀ < 0.1, charge injection occurs exclusively at the p⁺n^- junction. J_F = J₀ is an intermediate case. In each case J_F = 10 A/cm², and N_D is varied to change J₀. In order of decreasing J_F/J₀ the corresponding values of N_D are 2.610¹², 1.210¹³, 5.610¹³, 2.610¹⁴, and 1.210¹⁵ cm^-3.

Equation (23) predicts how the charge is injected at short times after the beginning of the transient. Obviously, as time progresses, the value of f(w,t) will change, since substantial charge is stored near the high-low junction in the steady state. The key turning point occurs when injected holes from the p+n junction reach the high-low junction. This of course will increase n(w,t), and increase f(w,t). In other words, double injection occurs [8], and injected charge will rapidly build up at the high-low junction after this time. This time can be estimated by dividing the middle region width w, by the drift velocity, such that

(25)

This can be rewritten using (19):

(26)

where

(27)

Figure 4 illustrates the validity of this calculation for w = 250 and J_F = 10 A/cm², for a range of N_D from 10¹⁴ to 510¹⁴ cm^-3. The hole concentration is plotted at t = t_di for each particular doping. In each case, the peak injected charge at the high-low junction is just beginning to become significant, reaching a density approximately equal to N_D. (Figure 1 shows that the steady state distribution is between 10¹⁶ and 10¹⁷ cm^-3, about two orders of magnitude higher than N_D.)

Fig. 4. Simulations calculated using the MEDICI simulator. The injected hole density at the high-low junction at t = t_di is shown for several different dopings. In each case, the peak density N_D. The charge injected at the high-low junction grows rapidly after t = t_di, due to the onset of double injection.

Of course, even after t = t_di, diodes with J_F < J₀ will still have less charge injected at the high-low junction than diodes with J_F > J₀, but the difference will be less noticeable than for t < t_di.

IV. IMPLICATIONS FOR PULSE SHARPENING DIODES

The use of drift step-recovery diodes in pulse sharpening applications has been described in [1]-[3]. An important characteristic describing the reverse transient of any step recovery diode is the ramp voltage, which is the voltage built up across the diode just before the fast sharpening transient begins. The ramp voltage should be as small as possible to obtain an ideal step waveform. In the DSRD, the fast transient begins when the charge sweeping-out boundary [7] emanating from the p⁺n junction meets the sweeping-out boundary emanating from the high-low junction. If the distance between the p⁺n junction and the meeting point of the sweeping-out boundaries is termed W_Q, the ramp voltage V_RAMP can be found by applying Poisson's equation to the fixed ionized charge and the mobile charge, assumed to be moving at the saturation velocity v_S. Thus,

(28)

The voltage developed across the quasineutral region between x = W_Q and the high-low junction will be much smaller than the voltage developed across the p-n junction space charge region [7], and is ignored.

To minimize V_RAMP, it is necessary to minimize W_Q. This implies maximizing |dn/dx| at the p⁺n^- junction such that the charge injected by the forward transient is kept very close to the junction. From the preceding section, we can see that this requires that J_F < J₀. Significant improvement in ramp voltage will occur as J_F is brought down from 10J₀ to J₀/10, and relatively little improvement will occur below this, as suggested by Figure 2. For instance, a DSRD designed to operate at 1700 V, with N_D = 10¹⁴ cm^-3, will have J₀ = 24.8 A/cm². For a cross sectional area of 0.3 cm², this corresponds to I₀ = 7.4 A. A diode with these parameters was manufactured and presented in [1], where a value of I_F = 3 A was used. Clearly these values of J_F and I_F fall within the predicted desirable range. Decreasing J_F further would have had the undesirable effect of either increasing the cross-sectional area and the junction capacitance, or increasing the forward pulse width t_F, which has its own limits as discussed below.

The expression derived for J₀ can also be used to estimate the maximum charge consistent with good step recovery action that can be stored in a DSRD. The charge stored in a DSRD during the forward bias pulse is given approximately by

(29)

where t_F is the duration of the forward pulse. Grekhov noted in [1] that for the injected charge to remain near the junction, t_F should be much smaller than the diffusion transit time t_T, where

(30)

If we choose I_F I₀/2, and t_F t_T/100 (such that the effective characteristic length of the injected carrier distribution is w/10) as reasonable maximum values, the maximum Q can be determined as a function of N_D and w. A more useful exercise is to plot the reverse transient storage time t_R as a function of V_BR and w, where

(31)

and, from [9]

(32)

where N_D is in cm^-3. In equation (31), it is assumed that the diode is operated just below breakdown, and that the pulse to be sharpened is a linear ramp (hence the average voltage of V_BR/2). To determine the cross section area of the device, the DSRD design equation from [1] is used:

(33)

Consideration of equations (24) and (29)-(33), and assuming R = 50 produces the plot shown in Figure 5. For the diode presented in [1] the maximum observed t_r consistent with good sharpening was about 50 ns, agreeing well with the 60 ns value predicted by Figure 5.

Fig. 5. The contours on this design chart show the maximum practical storage time t_r, in nanoseconds, for a psn diode with middle-layer width w and breakdown voltage V_BR.

Previous design approaches for DSRDs [1] did not specify a simple method of choosing J_F and w. The equations presented above, in the form of (24) and Figure 5, partially rectify this situation. The equations given above do not guarantee that a given diode structure can be used as a DSRD. Choosing J_F << J₀ ensures that the ramp voltage is minimized as much as possible for a particular structure, but it does not ensure that the ramp voltage is insignificant relative to V_BR. To calculate V_RAMP exactly computer simulations are required. Knowledge of J₀ is important for determining what scenarios are worth simulating.

V. CONCLUSION

In this paper, the evolution of the carrier distributions in p⁺sn⁺ diodes during the forward transient has been considered. A critical current density, J₀, has been derived. For J >> J₀, a p⁺sn⁺ diode will behave as a pin diode, with significant charge injection at both junctions. For J << J₀, significant charge injection will occur only at the pn junction for times t < t_di. For t > t_di, carriers will be injected by both junctions. Interestingly, doping levels in the middle layer (typically 10¹⁴ cm^-3) can be orders of magnitude less than the forward steady state carrier concentrations (typically > 10¹⁶ cm^-3), and yet can dramatically affect the evolution of the carrier distributions.

The critical current J₀ has been shown to be an important parameter in the design of drift step recovery diodes. To minimize the ramp voltage, J_F should be less than J₀. Also, knowledge of J₀ allows an estimate of the maximum usable stored charge in a DSRD. This parameter should prove useful in the design of several other high-power devices that rely upon transient forward biasing, or reversible injection control.

REFERENCES

[1] I. V. Grekhov et. al., "Power Drift Step Recovery Diodes", Solid-State Electronics, vol. 28, pp. 597-599. 1985.

[2] I. V. Grekhov, "New Principles of High Power Switching with Semiconductor Devices", Solid-State Electronics, vol. 32, pp. 923-930. 1989.

[3] V. S. Belkin and G. I. Shulzchenko, "Forming of high-voltage nanosecond and subnanosecond pulses using standard power rectifying diodes", Rev. Sci. Instr., vol. 65, pp. 751-753. 1994

[4] I. V. Grekhov et. al., "Superpower Switch of Microsecond Range", Solid-State Electronics, vol. 26, p. 1132. 1983.

[5] A. V. Gorbatyuk et. al., "Theory of Quasi-diode Operation of Reversely Switched Dinistors", Solid-State Electronics, vol. 31, pp. 1483-1491. 1988.

[6] R. C. Varshney and D. J. Roulston, "Transient Behaviour of a Range of P⁺-N-N⁺ Diodes With Narrow Centre Regions", Solid-State Electronics, vol. 13, pp. 1081-1095. 1969.

[7] H. Benda and E. Spenke, "Reverse Recovery Processes in Silicon Power Rectifiers", Proc. IEEE, vol. 55, pp. 1331-1354. 1967.

[8] R. H. Dean, "Transient Double Injection in Trap-Free Semiconductors", J. Appl. Phys., vol. 40, pp. 585-595. 1969.

[9] Sorab K. Ghandhi, Semiconductor Power Devices, NY: John Wiley & Sons, 1977, p. 45.