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A simple circuit for measuring C-V profiles at kilovolt voltages

Michael J. Chudobiak

Avtech Electrosystems Ltd., PO Box 5120, Stn. F, Ottawa, Ontario, Canada K2C 3H4

ABSTRACT

A simple circuit for measuring the capacitance-voltage profiles of high-voltage diodes is presented. The circuit is designed such that only one component, a non-critical power supply decoupling capacitor, requires a voltage rating equal to the maximum DC diode bias. Aside from this capacitor's voltage rating, there is no limit to the maximum DC bias that can be applied to the diode. C-V profiles generated using this circuit are presented for biases of 0 to 1000V, and are compared to those obtainable with a commercially available low-voltage capacitance meter. Errors of less than 2% are observed.

I. INTRODUCTION

Capacitance-voltage profiles are widely used as a diagnostic tool in the study semiconductors. In particular, the C-V profiles provide insight to the doping profiles of semiconductor junctions, and in special cases can be related directly to the doping profile1. Although numerous instruments are commercially available to measure the small-signal differential capacitance of semiconductor junctions2, these instruments generally do not allow DC biases of more than 200V. As an example, the Boonton 71-AR meter allows a DC bias to be directly applied for voltages up to 200V. For measurements at higher voltages, the bias can be applied by connecting the test capacitance to the meter through a large DC-blocking capacitor, and by applying the DC bias to the test capacitance through two parallel resonant filters3. This leads to several difficulties. The parallel filters must be closely tuned to 1 MHz, and the Q of the inductors used in the filter must be greater than 200. Inductors with such high Q are not widely available. Furthermore, both the DC-blocking capacitor and the bypass capacitor on the DC bias power supply must have a voltage rating greater than the maximum bias.

The circuit presented here eliminates these difficulties. Only one component requires the full DC bias rating, and no high Q inductors are required.

Avtech image

FIG. 1. Diode model used for measuring C-V profiles in reverse bias. The current source

represents the DC leakage current, and the capacitor models the diode junction capacitance.

II. THEORY

A pn junction can be modeled as a parallel combination of a voltage-dependent current source and a voltage-dependent capacitance, as shown in Fig. 1. If a DC bias voltage, A, is applied to the cathode of a diode, and a small AC signal Avtech image is applied to the anode, as shown in Fig. 1, the voltage across the diode will be

Avtech image (1)

and the resultant current will be

Avtech image (2)

As a simplifying assumption, one can assume the leakage current and the capacitance depend only on the DC component of the diode voltage, such that

Avtech image (3)

In general, this is a reasonable assumption for large values of Avtech image and for small values of B and IL. This is not a good assumption in forward bias or in reverse breakdown. However, it is generally the C-V profile in the reverse bias before breakdown that is of interest.

If this current flows through a resistance R, the resultant voltage will be

Avtech image (4)

Thus by observing the AC component of this voltage on an oscilloscope or on an AC voltmeter, the capacitance C(A) can be measured, since R, B, and Avtech image are known. Also, the diode leakage current can be measured by observing the DC component.

III. CIRCUIT IMPLEMENTATION

The circuit shown in Fig. 2 implements equations (1) - (4) directly. The DC bias, A, is applied to the cathode of the diode under test (DUT). The LH0032 is a high-speed, low bias current op amp used as a unity gain voltage follower to apply the AC test signal Bsin(t) to the anode of the DUT. Since the inverting input of the LH0032 has such a small bias current (typically < 500 pA), the diode current must flow through the resistor R, yielding a voltage across the resistor given by equation (4). The AMP-05 is a high-speed, low bias current instrumentation amplifier, used in this circuit as a unity gain voltage buffer. Since the voltage at the non-inverting and inverting inputs of the LH0032 will be equal (ignoring, for now, a small DC offset), the voltage across the input of the AMP-05 will equal the voltage across the resistor R.

The inverting input of the AMP-05 is connected to the non-inverting input of the LH0032, rather than the inverting input, to minimize the parasitic capacitance present at the anode of the DUT. The inverting input of the LH0032 will contribute some parasitic capacitance, which can not be removed. However, this capacitance, and any other stray capacitances to ground will appear as a constant offset in the measurements, which can be accounted for by measuring the output with the DUT removed.

By separating the DC bias and the AC test signal, the amplifiers and the sensing resistor R can all be standard low-voltage components. The only component that requires a high voltage rating (aside from the DUT itself) is the bypass capacitor Cb on the DC bias power supply. This capacitor serves two functions; it provides the AC path to ground for the AC test signal, and secondly, in conjunction with the inductor L, it suppresses any ripple present in the DC power supply. The circuit will actually measure the series combination of the DUT capacitance C(A) and Cb, so one should have Cb > 100 C(A) over the voltage range of interest for Cb to introduce less than 1% error.

For the measurements presented here, the values R = 31.9 k, B = 100 mVpp (35.3 mVRMS), Avtech image were used. This yields a capacitance sensitivity of Avtech image, and a leakage current sensitivity of 1/R, or Avtech image. The AC output voltage, and hence the capacitance, was measured using a Hewlett-Packard HP400F AC millivoltmeter. With no DUT in the circuit, a parasitic offset capacitance of 4.0 pF was observed.

To generate the 100 mV, 1 MHz sine wave a standard crystal oscillator circuit4, which generates a stable 1 MHz square wave, followed by a 4 pole 0.5dB-ripple Chebyshev lowpass filter5 nominally tuned to 1.2 MHz was used. A Kepco ABC1000M power supply was used to generate the DC bias.

Avtech image

FIG. 2. Schematic diagram of the high-voltage C-V profiler circuit. The output voltage VR is directly proportional to the capacitance of the diode under test (DUT).

IV. RESULTS

Figure 3 shows the C-V profiles for four different diodes, with the capacitance measured at 20 Volt intervals. Each diode is a 1N4935 from a different manufacturer. Diodes from Varo, General Instrument, Central Semiconductor, and Motorola were used. Interestingly, although the 1N4935 is rated as a 200V diode, all of the diodes in this sample were very conservatively rated and had breakdown voltages of at least 780V; two had VBR > 1000 V. Furthermore, the C-V profiles indicate that the internal structure (i.e. the doping profiles) of the four diodes from the different manufacturers are quite different. If they had identical doping profiles, and varied only in the diode cross-sectional area, the C-V profiles would be identical except for a multiplicative constant1.

Avtech image

FIG. 3. C-V profiles for four different varieties of the 1N4935 diode. The very flat nature of the Central diode C-V profile at high voltages indicates that the diode is punched-through. In contrast, the Motorola diode does not show punch-through behaviour.

A comparison of the Central Semiconductor and the Motorola diodes is particularly interesting, as their curves actually intersect. The Central diode C-V profile becomes quite flat above 400V, whereas the Motorola diode's curve continues its downward trend. This provides some insight to their relative doping profiles, since the diode capacitance can be related to the width, W, of the depletion region by6

Avtech image (5)

where is the dielectric constant and A is the cross-sectional area. Since power diodes such as the 1N4935 generally have a p+ n- n+ structure7, the C-V profiles strongly suggest that the Central diode has a narrower lightly-doped n- region than the Motorola diode, and hence that the diode punches through earlier, resulting in a depletion region that is almost entirely confined between the p+ and n+ regions. Since the depletion region edges are almost immobile in punch-through, the capacitance will remain constant for increasing reverse bias. In contrast, the Motorola diode does not appear to have this punch-through behaviour, suggesting that it has a very wide n- region, or a very gradual doping transition between the lightly doped and heavily doped regions.

This hypothesis can be tested by measuring the forward voltage drop at a given forward current. The diode with the narrower n- region should have a lower equivalent resistance, and hence a lower voltage drop, for diodes with similar area and carrier lifetimes8. Performing this measurement on several diodes from each manufacturer shows that the Motorola 1N4935 typically has a forward voltage of 0.88V at Id = 200 mA, and that the Central 1N4935 typically has a forward voltage of 0.81V at 200 mA, which tends to support the conclusions drawn from the C-V profiles.

The accuracy of these C-V profiles was measured by comparing the results for the Motorola diode, given in Fig. 3, to those obtained with a Boonton 71-AR capacitance meter, in the range of 0 to 200V (which is the maximum DC bias for the Boonton instrument.) The average difference magnitude between the two methods of measurement was 1.6% in this voltage range.

V. DISCUSSION

The primary advantage of this circuit is the relative ease with which small-signal capacitances can be measured at kilovolt DC biases. There is no inherent limit on the maximum DC voltage that can be applied to the DUT, other than practical considerations. That is, the bypass capacitor Cb must have a voltage rating greater than the maximum DC bias, and the physical construction of the circuit must be appropriate for high-voltage use.

Since the amplitude of the AC test signal, B, can be measured accurately with less than 1% error using an oscilloscope or by other means, and the frequency is crystal-controlled, the accuracy of the circuit is primarily limited by the tolerance of R and the gain-setting resistors of the instrumentation amplifier. These errors can be reduced by measuring the output with a known capacitance and adjusting the gain accordingly, otherwise one could expect 2% error. The nonlinearity of the AMP-05 amplifier is typically 0.001%, and can be ignored. As mentioned earlier, Cb must be sufficiently large to eliminate its effect on the measured capacitance.

The LH0032 and AMP-05 were chosen for their low input bias currents. The LH0032 typically has Ib < 500 pA, and AMP-05 has Ib < 30 pA. Since the AC current induced in the diode will be on the order of several microamps for the circuit values used above, these input bias currents can be neglected. Both amplifiers will introduce a small DC offset voltage, however this will not affect the capacitance measurement, which is based on an AC signal. Although the DC component can be used to measure the leakage current, better instruments are available for this purpose. However, monitoring the DC component does allow the user to avoid the onset of diode breakdown.

If the current-sensing resistor R is made too large, the instrumentation amplifier slew rate may be exceeded. The typical AMP-05 slew rate isAvtech image, which limits the output voltage to 2.4 Vpp for a 1 MHz signal. Thus, in consideration of equation (4), R can not exceed Avtech image for a 20 pF capacitance. In practice, it is wise to make R smaller, such that the resistive component of R is much smaller than the impedance of the parasitic capacitance that will exist in the resistor(s). (For this reason, when implementing R in a circuit, it is desirable to use resistors in series rather than resistors in parallel, to reduce parasitic capacitance across R. Parasitic inductance can be neglected at these frequencies.)

The input sine wave must be relatively pure, since the measured current is a function of the derivative of this input. The sinewave output available from typical function generator instruments and integrated circuits are often formed using diode forming networks, which will produce slight "knees" in the generated sine wave, which are magnified in the derivative9. A filter is necessary to remove the undesired harmonics.

For special cases, doping profiles can be related directly to the C-V profiles1. However, these relationships generally involve C and dC/dV. Since C varies so slowly at higher voltages, as shown in Fig. 3, a digital AC millivoltmeter must be used to obtain the necessary precision, rather than the analog HP400F that was used in generating Fig. 3. There is no inherent limitation in the circuit of Fig. 3, other than the noise floor, preventing a satisfactory degree of precision from being obtainable.

REFERENCES

1 J. Hilibrand and R. D. Gold, RCA Review 21, 245 (1960).

2 D. W. Palmer, in Growth and Characterisation of Semiconductors, edited by R. A. Stradling and P. C. Klipstein (Adam Hilger, Bristol, England, 1990), p. 196.

3 Models 71A and 71AR Instruction Manual, (Boonton Electronics Corp., Parsippany, N.J.), p. 3-13.

4 R. J. Matthys, Crystal Oscillator Circuits, (Wiley-Interscience, NY, 1983), p. 174.

5 P. Horowitz and W. Hill, The Art of Electronics, 2nd ed., (Cambridge Univ. Press,

Cambridge, 1989), p. 274.

6 J. L. Moll, Physics of Semiconductors, (McGraw-Hill, NY, 1964), p. 125.

7 B. J. Baliga, Modern Power Devices, (Wiley-Interscience, NY, 1987), p. 413.

8 H. Benda and E. Spenke, Proc. IEEE, 55, 1331 (1967).

9 Nonlinear Circuits Handbook, 2nd ed., edited by D. H. Sheingold (Analog Devices, Inc., Norwood, MA, 1976), p. 43.