Abstract
The most common class E amplifier configuration uses a single transistor with a shunt capacitor and a series resonant output filter. Until now a linear shunt capacitance has been assumed. However, to achieve operation at 900 MHz and above, it is of interest to rely solely upon the nonlinear parasitic collector-substrate capacitance of the transistor. An analytical theory for operation at 50% duty cycle and nonlinear capacitance is presented in this paper, and the effects on the power capability of the amplifier are discussed.
I. Introduction
Class E tuned power amplifiers have gained widespread acceptance since their introduction [1] due
to their simplicity, high efficiency, excellent designability, and relative intolerance to circuit variations [2].
Figure 1 shows the most common class E configuration.
Fig. 1. Basic class E amplifier configuration.
The transistor acts as a switch, rather than as an amplifier. When the transistor switch is
closed, the collector voltage ideally is zero, and a large collector current can exist. When the switch is open, no
current flows, but a large collector voltage can exist. Thus, simultaneous nonzero voltage and current is avoided,
eliminating transistor power losses in the fully-open and fully-closed states. The capacitor C1 acts to hold the
collector voltage vc at zero volts during the on-to-off switch transition, to avoid switching losses. The CF, LF,
jX, R network is designed such that the collector voltage falls back to zero just before the off-to-on transition,
again to avoid switching losses. Typical collector or drain voltage and current waveforms for an optimally tuned
class E amplifier are shown in Figure 2.
Fig. 2. Typical collector voltage and current waveforms.
This circuit has been extensively analyzed [1]-[11], however these analyses have all assumed that the shunt capacitance was constant. As operating frequencies reach 900 MHz and beyond, the shunt capacitance predicted by these analyses may become comparable to the parasitic collector-to-substrate capacitance of the transistor. For this reason, it is of interest to study the response of a Class E amplifier with a shunt capacitance of the form:
(1.1)
This is the capacitance due to a step junction with built-in potential Vbi, and reverse bias V, as might occur at the collector-substrate junction. If the substrate is grounded, then V corresponds to the collector voltage. This is the case that is studied in this paper.
This paper will derive expressions for the circuit parameters required for 100% efficiency. To avoid the need for numerical analysis, the switching duty cycle is assumed to be 50%, which is the optimum for a circuit using a linear capacitance [4].
II. Basic Voltage and Current Relations
The assumptions made in this analysis are: a) a constant current I flows through the RF choke, b)
the transistor switch is open for 
, and closed
for 
, and c) the output filter consisting
schematically of LF and CF is tuned to the output frequency 
and has infinite Q.
Following the conventional analysis presented by Raab [4], the output voltage and current can be written:
(2.1)
(2.2)
where c and 
are to be
determined, and 
.
The impedance jX introduces a phase shift between the fundamental component of the collector voltage and the output, so the voltage v1 may be written from simple considerations as:
(2.3)
where
(2.4)
and
(2.5)
When the transistor switch is open, the capacitor current icap is the difference between the constant choke current I and the output current, so
(2.6)
Knowing the capacitor current one can then calculate the collector voltage using
(2.7)
(2.8)
(2.9)
Evaluating the integrals in (2.9) and rearranging yields the collector voltage for 
. The collector voltage is:
(2.10)
In the following sections expressions for the circuit parameters I, C0, 
, 
, c,
and X are derived for optimum operation in terms of the load resistance R, supply voltage Vcc, junction barrier
voltage Vbi, and frequency 
.
III. Optimum Operation
For optimum operation the collector voltage should be zero during the closing of the switch to eliminate switching power losses, and the voltage rate of change should be zero at this time to allow for slight mistuning [1]. For
(3.1)
equation (2.10) reduces to
(3.2)
For the second condition, equation (2.7) implies zero capacitor current, so (2.6) can be simplified to
(3.3)
Dividing (3.3) by (3.2) yields
(3.4)
or
(3.5)
The phase of the class E output waveform is not changed by the presence of the capacitor nonlinearity.
IV. Power Supply Requirements
Since no switching losses occur and there are no other loss mechanisms, the ideal amplifier is 100% efficient. This implies that the input and output powers are equal, or
(4.1)
Using (3.3) to eliminate c yields
(4.2a)
(4.2b)
Similarly, using (3.3) to eliminate IR from (4.1) determines the output voltage:
(4.3a)
(4.3b)
Thus the supply current and the output voltage are also not affected by the capacitance nonlinearity.
By virtue of the choke in the DC power supply path, the average collector voltage must be Vcc. Thus
(4.4a)
(4.4b)
After integrating, and substituting (3.2) and (3.3) for 
and 
in the resulting equation,
(4.4b) simplifies to:
(4.5)
Using (4.3a) to eliminate c and (4.2a) to eliminate I in (4.5) produces an expression where C0 is the only unknown:
(4.6)
This expression is quadratic in C0; the physically meaningful root is:
(4.7)
Equation (4.7) allows the calculation of the optimum parasitic capacitance for a transistor designed to operation at a given voltage, frequency and load. Alternatively, if the parasitic capacitance is given, the optimum power supply voltage for a given load and frequency can be determined.
V. Fourier Analysis
The angle 
, used in (2.5) to
determine the reactance X, can be determined from Fourier analysis of the collector voltage. The fundamental
component of 
must equal 
, so that
(5.1)
However, it is easier to examine the quadrature component, which must equal zero:
(5.2)
Performing this integration, using the expression in (2.10) for vc(), and substituting (3.2) and
(3.3) for 
and 
in the resulting equation produces
(5.3)
Now the reactance X can be calculated by rearranging (2.5) to obtain
(5.4)
Figure 3 shows a plot of the ideal reactance X versus the supply voltage, for various degrees of
nonlinearity. The condition vbi = 
is equivalent
to the case of a linear capacitor.
Fig. 3. Optimum circuit reactance X.
VI. Power Capability
It can be seen from this analysis that while the presence of a nonlinear capacitor does not affect the supply current or output voltage, as compared to a linear capacitor, it does affect the choice of X and the shape of the collector voltage. This implies a change in the normalized power capability, a figure of merit defined as [12]
(6.1)
The maximum output power Po,max is equal to the input power, VccI. The maximum collector current ic,max occurs when icap = 0 and the output current is at its minimum, that is
(6.2)
Determining the maximum collector voltage is more involved. The maximum voltage must occur when
equals zero, which implies that icap = 0, so
(2.6) gives
(6.3)
Equation (3.3) can be used to eliminate I, R, and c from (6.3), producing
(6.4)
If this angle is substituted into (2.10), the maximum voltage can be found. It is
(6.5)
The ratio vmax/Vcc is plotted for various values of Vbi and Vcc in Figure 4. Figure 4 shows the
significant increase in maximum collector voltage required to supply the same output voltage as with a linear
capacitance. As a result the power capability, plotted in Figure 5, decreases. As Vcc approaches zero, Pmax
approaches the ideal linear capacitor Pmax of 0.0981. As Vcc increases Pmax asymptotically approaches
0.0756.
Fig. 4. Maximum collector voltage.
Fig. 5. Normalized power capability.
Figures 4 and 5 indicate that the nonlinear nature of parasitic capacitors must be taken into
account when specifying the breakdown voltage of the transistor. Figure 6 shows the difference between the
collector voltages of a circuit with nonlinear capacitance and one with linear capacitance. The waveforms were
calculated by substituting the derived values for I, c, 
, and C0 into (2.10) for the case of Vcc = 5V. Qualitatively, one would expect that since the nonlinear
capacitance is largest at zero voltage, the waveform will rise more slowly than in the linear case. As the voltage
increases, the capacitance will decrease, and hence the voltage should begin to rise more quickly than in the
linear case. This is in fact observed in the waveforms of Figure 6.
Fig. 6. Collector waveforms for Vcc = 5V.
VII. Conclusions
The circuit parameters and voltage and current waveforms have been derived for optimum class E
operation at 50% duty cycle, with a nonlinear shunt capacitance. It was shown that although the output voltage and
current are not affected by the presence of the capacitance nonlinearity, the peak voltage across the transistor
increases relative to the linear case, and the normalized power capability decreases. This can lead to junction
breakdown if not accounted for. This analytical theory should prove useful in implementing high speed
communications circuits at 900 MHz and above where the parasitic capacitance can be the speed-limiting factor,
precluding the use of added linear capacitance.
References
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[2] F. H. Raab, "Effects of Variations on the Class E Tuned Power Amplifier," IEEE J. Solid-State Circuits, vol. SC-13, pp.239-247, April 1978.
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[8] R. E. Zulinski and J. W. Steadman, "Class E Power Amplifiers and Frequency Multipliers with Finite DC-Feed Inductance," IEEE Trans. Circuits and Systems, vol. CAS-34, pp.1074-1087, Sept. 1987.
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[10] K. J. Herman, R. E. Zulinski, and J. C. Mandojana, "An Efficient Computer Program For The Exact Analysis Of Class E Amplifiers," Proc. 32nd Midwest Symp. on Circuits and Systems, vol.1, p.478-481, Aug. 1989.
[11] J. C. Mandojana, and R. E. Zulinski, "Computer-Aided Design of Class E Amplifiers", Proc. 34th Midwest Symp. on Circuits and Systems, p.866-869, May 1991.
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